The invention relates to a bipolar transistor, and more particularly to a bipolar transistor with a base having an extremely low resistance and method for fabricating the same.
It has been known in the art, to which the invention pertains, that on of the most important factor associated with properties of a silicon bipolar transistor would be the noise figure which is represented by the following equation. EQU NF=1+r.sub.b '/r.sub.g +r.sub.e /2r.sub.g +((r.sub.g +r.sub.b '+r.sub.e).sup.2 /(2.alpha..sub.o r.sub.e r.sub.g)) (f/1.2f.sub.T +1/h.sub.FE +I.sub.cb /I.sub.E)
where r.sub.g is the impedance of signal source, r.sub.b ' is the base resistance, r.sub.e is the emitter resistance and .alpha..sub.o is the coefficient of amplification at a high of the bipolar transistor when a base thereof is grounded.
From the above equation, it could be understood that when the base resistance r.sub.b ' is reduced, then the noise figure is also reduced. To reduce the base resistance r.sub.b ' it has been proposed to cause an impurity concentration N.sub.A of the base layer to increase. The silicon bipolar transistor, however, shows an increase of a base leak current when the impurity concentration N.sub.A of the base layer is increased more than 1.times.10.sup.19 cm.sup.-3.
To solve this problem, it has been proposed to use a SiGe amorphous base layer in place of the silicon base layer so that the impurity concentration of the SiGe amorphous base layer may be raised up to 1.times.10.sup.20 cm.sup.-3 with almost no base leak current, which is mentioned in the Japanese Laid-open Patent Application No. 3-76228. The conventional SiGe base bipolar transistor may be fabricated as follows.
With reference to FIG. 1A, field oxide films 14 are 14 are selectively formed on an n-type silicon substrate 13.
With reference to FIG. 1B, a silicon oxide film SiO.sub.2 15 is formed on an entire part of the substrate 13 and then a polysilicon film 16 is formed on an entire surface of the silicon oxide film 15. A p-type impurity such as boron is implanted into the polysilicon film 16.
With reference to FIG. 1C, an opening 17 is formed in the polysilicon film 16 and the silicon oxide film 15 to have a part of the silicon substrate expose thereby the remaining part of the polysilicon film 16 serves as a base plug layer 16a.
With reference to FIG. 1D, a p-type SiGe epitaxial base layer 18 is formed by a chemical vapor deposition method on the entire surface of the device.
With reference to FIG. 1E, an inter-layer insulator 19 is formed on an entire surface of the device.
With reference to FIG. 1F, an opening 20 is selectively formed in the inter-layer insulator 19 to cause a part of the surface of the p-type epitaxial base layer 18 to expose.
With reference to FIG. 1G, a polysilicon layer is formed on an entire surface of the device and then an n-type impurity such as phosphorus is implanted into the polysilicon layer for subsequent patterning of the polysilicon layer to have the n-doped polysilicon layer remain within the opening 20 and an upper part thereof so that the remaining n-doped polysilicon layer may serve as an emitter region 21 to thereby form an emitter/base junction. A contact hole is formed in the inter-layer insulator 19 wherein the contact hole is spaced apart from the emitter region 21. An aluminum film is formed on an entire surface of the device and thereafter the aluminium film is patterned to have the aluminium film remain on the emitter region 21 and within the contact hole to thereby form an emitter plug electrode 22 and a base wiring 23. The fabricated bipolar transistor has the p-type polysilicon layer with a base active part 24 which is in contact with the surface of the n-type silicon substrate 13.
The base active part 24 is electrically connected via the base plug layer 16a to the base wiring 23. The base plug layer 16a has a higher resistivity than a resistivity of the epitaxial base layer 18 including the base active layer 24, for which reason the base resistance depends substantially upon the resistance of the base plug layer 16a. This mean that any possible reduction in the resistance of the base active part 24 does not contribute to a substantial reduction of the base resistance of the bipolar transistor in so far as the resistance of the base plug layer 16 is not reduced. As illustrated in FIG. 1D, since the epitaxial base layer 18 is formed on the polysilicon layer 16a, the epitaxial base layer 18 positioned over the polysilicon layer 16a has a polycrystal structure rather than epitaxial structure. This may contribute to raise the base resistance of the bipolar transistor thereby resulting in a deterioration of the noise figure.
Another conventional bipolar transistor is disclosed in the Japanese Laid-open Patent Application No. 3-227023, which has a SiGe base layer without any base plug layer. This conventional bipolar transistor having no base plug layer is free from the above problem in deterioration of the noise figure. This conventional bipolar transistor may be fabricated as follows.
With reference to FIG. 2A, an n.sup.+ -Si substrate 25 is prepared so that an n.sup.- -Si epitaxial layer 29 is formed on an entire surface of the substrate 25. Field oxide films 26 are selectively formed in the silicon epitaxial layer 29 by the local oxidation of silicon method so that the field oxide films 26 have bottoms which are positioned on the surface of the silicon substrate 25. An opening 28 is then formed over the silicon epitaxial layer 29 by a photo lithography for partial removal of the field oxide films but only positioned over the silicon epitaxial layer 29 thereby a surface of the device has a step-like discontinuity 36 in level between the field oxide film 26 and the silicon epitaxial layer 29.
With reference to FIG. 2B, p-SiGe amorphous layer 30 is formed on an entire surface of the device to cover the field oxide films 26 and the silicon epitaxial layer 29. An SiO.sub.2 film 31 is formed on an entire surface of the SiGe amorphous layer 30.
With reference to FIG. 2C, the SiGe layer 30 and the SiO.sub.2 film 31 are patterned by etching to remain within the opening 28 over the silicon epitaxial layer 29.
With reference to FIG. 2D, a silicon nitride film 32 is formed on an entire surface of the device to cover the patterned silicon oxide film 31 and the field oxide film 26.
With reference to FIG. 2E, openings respectively for emitter and base contacts are formed in the silicon nitride film 32 and the SiO.sub.2 film 31 to have parts of the SiGe layer 30 exposed. An n-doped polysilicon film 33 is selectively formed in the opening for the emitter contact and in the vicinity thereof.
With reference to FIG. 2F, an emitter contact 34 is formed on the n-doped polysilicon film 33 as well as a base contact 35 is selectively formed in and vicinity of the base contact hole.
The above conventional bipolar transistor is engaged with the following problem.
As illustrated in FIG. 2A, the filed oxide film 26 extends on an edge of the silicon epitaxial layer 29 with the discontinuity in level between the field oxide film 26 and the silicon epitaxial layer 29. The SiGe amorphous layer 30 has an epitaxial growth part on the silicon epitaxial layer 29 and a polycrystal growth part on the field oxide film 26 wherein the epitaxial growth part is in contact with the polycrystal growth part, resulting in that the polycrystal part of the SiGe layer 30 is formed over the silicon epitaxial layer 29. This means that the SiGe base layer 30 may have a polycrystal growth part which contacts with the emitter polysilicon film 33. Accordingly, the emitter/base junction may be in the polycrystal structure thereby resulting in an increase in leakage current flowing across the emitter/base junction and in the unstability of an ohmic contact of the emitter/base junction.
Since the SiGe layer 30 is formed over the discontinuity 36 in level between the field oxide film 26 and the silicon epitaxial layer 29, the SiGe layer 30 also has a discontinuity in level. This may result in a lowering in accuracy of the subsequent photo lithography process. A thickness of the field oxide film 26 over the silicon epitaxial layer 29 or a height of the discontinuity 36 in level between the field oxide film 26 and the silicon epitaxial layer 29 is approximately 50 nanometers in consideration of the reduction in stress of the field oxide film 26 in its formation. This makes it difficult to allow the SiGe layer to have a large thickness for the reduction of the base resistance.
In the prior arts, to which the invention pertains, there is no technical idea for allowing the bipolar transistor to be free from the above disadvantages.